When fabricating semiconductor devices, devices can be stacked in a chip or a wafer and connected through a via. This method is commonly referred to as a system in package (SiP).
The SiP technique generally stacks various chips vertically in order to minimize the size of a semiconductor device.
An important aspect of the SiP is the forming of the via and the wafer bonding technique for interconnecting between the chips.
In a semiconductor SiP, in order to directly connect a chip to a substrate, a flip chip bonding method is typically used. The flip chip bonding method is a method that involves forming a bump on a chip pad and directly bonding the bump to the substrate of another chip.
A bump is an external connecting terminal, typically of a size in the range of 10 μm to 100 μm, formed of a metal material, such as gold, on an aluminum pad of a wafer.
However, the process for forming a bump can be very complicated and can make the overall process time very long.
Thus, there exists a need in the art for an improved fabricating method of a SiP, and, more specifically an improved wafer bonding method.